Description: Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms by Andreas Wieferink, Heinrich Meyr, Rainer Leupers This book presents a methodology and the associated tooling for enabling design space exploration as well as a successive refinement flow for the design of optimized MP-SoCs with a high degree of automation. FORMAT Paperback LANGUAGE English CONDITION Brand New Publisher Description Computerarchitecturepresentlyfacesanunprecedentedrevolution: Thestep from monolithic processors towards multi-core ICs, motivated by the ever - creasingneedforpowerandenergyef ciencyinnanoelectronics. Whetheryou prefer to call it MPSoC (multi-processor system-on-chip) or CMP (chip mul- processor), no doubt this revolution affects large domains of both computer science and electronics, and it poses many new interdisciplinary challenges. For instance, ef cient programming models and tools for MPSoC are largely an open issue: "Multi-core platforms are a reality - but where is the software support" (R. Lauwereins, IMEC). Solving it will require enormous research efforts as well as the education of a whole new breed of software engineers that bring the results from universities into industrial practice. Atthesametime,thedesignofcomplexMPSoCarchitecturesisanextremely time-consuming task, particularly in the wireless and multimedia application domains, where heterogeneous architectures are predominant.Due to the - ploding NRE and mask costs most companies are now following a platform approach: Invest a large (but one-time) design effort into a proper core - chitecture, and create easy-to-design derivatives for new standards or product features. Needless to say, only the most ef cient MPSoC platforms have a real chance to enjoy a multi-year lifetime on the highly competitive semiconductor market for embedded systems. Notes New methodology with potential for obtaining best results in MP-SoC designMost detailed book about retargetable processor system integrationSeparate, elaborated introduction into state of the art for all 3 involved fields Back Cover The ever increasing complexity of modern electronic devices together with the continually shrinking time-to-market and product lifetimes pose enormous chip design challenges to meet flexibility, performance and energy efficiency constraints. As a consequence, the current trend is towards programmable platforms (Multi-Processor System-on-Chip Platforms, MP-SoC), which are tailored to the respective target application. In the usual case, a new platform is designed by selecting and assembling standard platform elements. However, best results can only be achieved if the processor cores and the communication modules themselves are also optimized for the target application. Effective exploration is only possible if accurate module simulators are generated automatically based on abstract specifications. As a matter of fact, CoWares BusCompiler allows generating accurate simulators for communication modules, and modeling languages such as LISA enable the same for processor cores. In Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms, such originally independent approaches are combined in order to enable the development of highly optimized programmable platforms. The first chapters of this book summarize the state of the art in all three involved fields separately: general system level design, communication modeling, and processor modeling. The main chapters then present a methodology and the associated tooling for enabling design space exploration as well as a successive refinement flow for the design of optimized MP-SoCs with a high degree of automation. Author Biography Both Prof. Heinrich Meyr and Prof. Rainer Leupers have (co-)authored numerous books for Springer Table of Contents SOC Design Methodologies.- Communication Modeling.- Processor Modeling.- Processor System Integration.- Successive Top-Down Refinement Flow.- Automatic Retargetability.- Debugging and Profiling.- Case Study.- Summary. Long Description Computerarchitecturepresentlyfacesanunprecedentedrevolution: Thestep from monolithic processors towards multi-core ICs, motivated by the ever - creasingneedforpowerandenergyef ciencyinnanoelectronics. Whetheryou prefer to call it MPSoC (multi-processor system-on-chip) or CMP (chip mul- processor), no doubt this revolution affects large domains of both computer science and electronics, and it poses many new interdisciplinary challenges. For instance, ef cient programming models and tools for MPSoC are largely an open issue: "Multi-core platforms are a reality - but where is the software support" (R. Lauwereins, IMEC). Solving it will require enormous research efforts as well as the education of a whole new breed of software engineers that bring the results from universities into industrial practice. Atthesametime,thedesignofcomplexMPSoCarchitecturesisanextremely time-consuming task, particularly in the wireless and multimedia application domains, where heterogeneous architectures are predominant. Due to the - ploding NRE and mask costs most companies are now following a platform approach: Invest a large (but one-time) design effort into a proper core - chitecture, and create easy-to-design derivatives for new standards or product features. Needless to say, only the most ef cient MPSoC platforms have a real chance to enjoy a multi-year lifetime on the highly competitive semiconductor market for embedded systems. Feature New methodology with potential for obtaining best results in MP-SoC design Most detailed book about retargetable processor system integration Separate, elaborated introduction into state of the art for all 3 involved fields Details ISBN9048179165 Author Rainer Leupers Publisher Springer Year 2010 ISBN-10 9048179165 ISBN-13 9789048179169 Format Paperback Publication Date 2010-10-19 Imprint Springer Place of Publication Dordrecht Country of Publication Netherlands DEWEY 004.35 Edition 1st Short Title RETARGETABLE PROCESSOR SYSTEM Language English Media Book Pages 162 Illustrations XIV, 162 p. DOI 10.1007/978-1-4020-8652-6 Edition Description Softcover reprint of hardcover 1st ed. 2008 Alternative 9781402085741 Audience Professional & Vocational We've got this At The Nile, if you're looking for it, we've got it. With fast shipping, low prices, friendly service and well over a million items - you're bound to find what you want, at a price you'll love! TheNile_Item_ID:96282168;
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ISBN-13: 9789048179169
Book Title: Retargetable Processor System Integration Into Multi-Processor System-On-Chip Platforms
Item Height: 235mm
Item Width: 155mm
Author: Heinrich Meyr, Rainer Leupers, Andreas Wieferink
Format: Paperback
Language: English
Topic: Computer Science, Physics
Publisher: Springer
Publication Year: 2010
Type: Textbook
Item Weight: 278g
Number of Pages: 162 Pages
